As photonics becomes more widely used in communications equipment, it is increasingly important to improve the performance characteristics of optoelectronic circuit elements. Several prior art designs exist for optical receivers--circuits that receive optical input beams and generate output signals, either electrical signals for further electronic processing, or regenerated optical signals.
Two such prior art designs are disclosed in Optical Fiber Telecommunications II, edited by Stewart E. Miller et al.--a high input impedance receiver (Miller et al., FIG. 18.4), and a transimpedance receiver (Miller et al., FIG. 18.6). Receiver 100 (FIG. 4) is a field-effect transistor (FET) implementation of a high input impedance receiver. An optical input beam P is received by a reverse-biased detector diode 102, e.g., a p-i-n diode, which is connected in series with a resistor 101, e.g., 1.0 Kohm, across a voltage source, -V.sub.det =-5.0 volts to -10.0 volts. The junction between diode 102 and resistor 101 is connected to the gate of an input-stage, FET 104 (a bipolar transistor could also be used). FET 104 is connected in series with a second FET 103 at an electrical node F. FET 103 acts as an electrical load and could be replaced by a resistor. A voltage source, for example, V.sub.dd =2.0 volts, provides current through FET 103, and FET 104 provides variable current depending on the level of the optical input beam. The input stage (FETs 103, 104) amplifies the voltage at the FET 104 gate such that the voltage at node F varies, for example, between 0.5 volts and 1.5 volts. A level shifter--FETs 105 and 106 with a diode 107 connected therebetween--shifts the level such that electrical output Q varies between -0.5 volts and +0.5 volts (-V.sub.SS =-1.0 volts to -1.5 volts).
Receiver 200 (FIG. 5) is an FET implementation of a transimpedance receiver. In receiver 200, diodes 202 and 207 correspond to diodes 102 and 107 of receiver 100 (FIG. 4); FETs 203, 204, 205, 206 in receiver 200 (FIG. 5) correspond to FETs 103, 104, 105, 106 in receiver 100 (FIG. 5). The output electrical signal S is fed back via a resistor 201 to the gate of FET 204. The gain of receiver 200 is more dependent on the value of resistor 201 than on the characteristics of the FETs. The input impedance is lower than that of receiver 100 (FIG. 4); accordingly, receiver 200 operates faster than receiver 100.
Both the high input impedance receiver and the transimpedance receiver have some serious disadvantages. The bandwidth of the receivers is fixed, based on the resistor values, rather than variable. A substantial amount of optical signal energy is dissipated in the resistors of the two receivers. Retiming is difficult to achieve. Both the high input impedance receiver 100 and the transimpedance receiver 200 have a single-ended optical input; differential optical input variations of the two designs require many more transistors and are therefore both costly and complex.